Essentially all currently used methods of producing Si-based semiconductor devices involve the epitaxial growth of single crystal Si on a single crystal substrate, typically a Si substrate. A variety of growth methods are known. Among these is molecular beam epitaxy (MBE), which involves exposing, in a vacuum chamber, a substrate to a flux of one or more atomic or molecular species, the flux of a given species originating from a source, exemplarily comprising a quantity of molten Si. However, though MBE is finding use in making compound semiconductor devices, to date it has not found significant use for making Si-based devices. This is at least in part due to the so-called "doping problem" in Si MBE.
In contrast to other known methods of epitaxial material growth (e.g., CVD), MBE does not inherently require high substrate temperatures. However, it has generally been believed that single crystal epitaxial Si of more than a few monolayer thickness can only be grown by MBE if the substrate temperature T.sub.s is at or above a temperature T.sub.epi.sup..about. 300.degree. C. Typically, commercially significant growth conditions involve T.sub.s of at least about 450.degree. C. As is well known to those skilled in the art, prior art MBE techniques have generally been unable to produce Si with electrically active dopant concentrations above about 10.sup.18 cm.sup.-3, due at least in part to surface segregation of the dopant atoms on the Si substrate surface. This is the above referred to doping problem. On the other hand, it would be highly desirable to be able to produce by MBE device-grade epitaxial Si doped to levels above 10.sup.18 or even 10.sup.19 cm.sup.-3, since such highly doped Si is of considerable interest, e.g., for high speed bipolar transistors.
H. Jorke et al., Physical Review B, Vol. 40, pp. 2005-2008 (1989) report a growth rate dependence of the minimum temperature for epitaxial growth of Si by MBE. For instance, at the (quite low) deposition rate of 0.1 nm/s, films of thickness 1 .mu.m were found to be single crystalline if T.sub.s was in the range 870-590K, to contain increasing densities of cone-like defects for T.sub.s in the range 590-500K, and to be amorphous below 500K (227.degree. C.). These workers proposed the existence of a "maximum epitaxy width .DELTA.E" that depends both on the deposition rate and the substrate temperature, and defines the maximum thickness of an epitaxial Si layer that can be grown at a given rate and temperature. In H. Jorke et al., Thin Solid Films, Vol. 183, pp. 307-313 (1989), the cone-like defects are described as being" . . . accompanied by a large number of (111) and (111) oriented smaller scale defects which can be identified as twins . . . ". Thus it is evident that Si layers with cone-like defects are not single crystal layers, and generally will not be acceptable for device manufacture.
The possibility of growing single crystal epitaxial Si at low substrate temperatures, exemplarily .ltorsim.350.degree. C. or even 300.degree. C., is of substantial interest for semiconductor device manufacture. For instance, H. Jorke et al., Applied Physics Letters, Vol. 54(9), pp. 819-821 (1989), list the following three advantages of a low growth temperature:
i) increased overall compatibility with additional processes required for the fabrication of electronic devices;
ii) reduced tendencies for three-dimensional growth and intermixing processes in heterostructure growth; and
iii) reduction of surface segregation, observed at common growth temperatures for the majority of dopants, due to kinetic limitations.
In the first mentioned paper by Jorke et al. the authors also point out that growth at low temperature" . . . offers very promising feasibilities to construct atomic-scale Sb distributions in silicon MBE films." Low temperature growth also offers the potential of relatively abrupt dopant profiles, a feature that will be of increasing importance as smaller and smaller design rules are used.
The potential advantages of low temperature MBE growth are not limited to Si but would at least to some extent also be present in III-V compound semiconductors such as GaAs and InP.
In the second-mentioned Jorke et al. paper it is reported that homogeneously Sb-doped, 0.1 .mu.m thick epitaxial Si layers were grown with T.sub.s in the range 250.degree.-350.degree. C., with maximum Sb concentrations of 10.sup.18 cm.sup.-3 achieved. However, it is reported that only a small fraction (e.g., 17% in layers grown at 250.degree. C., 23% in layers grown at 300.degree. C.) of the Sb atoms were electrically active at room temperature. This result is ascribed to the existence of a " . . . Sb impurity complex which is similar to the SiAs.sub.4 cluster . . . ". Those skilled in the art know that it is the density of electrically active (i.e., ionized) dopant atoms that is of device significance, and that the presence of a significant fraction of un-ionized dopant atoms is highly undesirable, since un-ionized dopant atoms cause excess scattering without contributing to the carrier density.
In the Jorke et al. paper in Applied Physics Letters it is reported that a monolayer (10.sup.15 cm.sup.-2) of Sb was deposited on (100) Si with a 0.1 .mu.m not intentionally doped Si cap layer deposited thereon at T.sub.s in the range 200.degree.-350.degree. C. The lowest temperature is said to have resulted in an amorphous cap layer, with T.sub.s .gtoreq.250.degree. C. said to have resulted in crystalline Si. The fraction of electrically active dopant atoms at room temperature is reported to decrease with decreasing deposition temperature T.sub.s, being 0.81 for T.sub.s =350.degree. C., and about 0.45 for T.sub.s =200.degree. C.
F. Schaffler et al, Thin Solid Films, Vol. 184, pp. 75-83 (1990) report on Ga doping of Si MBE epitaxial layers at relatively low temperatures (550.degree.-300.degree. C.). These workers apparently were attempting to produce a step-function doping profile and found that, for T.sub.s .ltorsim.400.degree. C., the Ga concentration in the Si layer is highly non-uniform. For instance, for T.sub.s =350.degree. C., a growth rate of 0.25 nm/s, and a constant Ga flux of 3.5.times.10.sup.10 /cm.sup.2.s, the Ga concentration was found to increase roughly linearly with time for about the first 400s (0.1 .mu.m layer thickness) to about 2.times.10.sup.16 cm.sup.-3, followed by an almost exponential increase, reaching a peak of about 4.times.10.sup.18 cm.sup.-3 at about 0.35 .mu.m, with the concentration thereafter decreasing to about 1.5.times.10.sup.18 cm.sup.-3 at the top surface of the 0.5 .mu.m thick layer. For T.sub. s =300.degree. C. the behavior was even more non-linear, with the peak concentration of about 3.times.10.sup.18 cm.sup.-3 reached at about 0.1 .mu.m, dropping to about 1.5.times.10.sup.18 cm.sup.-3 at about 0.25 .mu.m, and remaining at this level thereafter, indicating that all arriving Ga atoms are incorporated into the lattice within the growth of one monolayer. As those skilled in the art know, unintentionally highly non-uniform dopant concentrations are generally undesirable.
F. Schaffler et al. (ibid) state that flat doping (i.e., Ga) profiles " . . . can be achieved by creating an adequate dopant layer before growth commences (pre-build-up), and keep (sic) it constant during growth by replenishing the desorption and incorporation losses." However, the results presented do not support the proposition that pre-build-up results in a flat doping profile (see, for instance FIG. 2 of the reference).
A known method of producing a doped epitaxial Si layer on a Si substrate is solid phase epitaxy (SPE). This method typically involves depositing a dopant layer on a Si surface, followed by deposition of an amorphous Si layer thereon, and heating the combination such that the amorphous layer becomes transformed into a crystalline layer. See, for instance, A. A. van Gorkum et al., Journal of Applied Physics, Vol 56(6), pages 2485-2492, and K. Nakagawa et al., Applied Physics Letters, Vol. 54(19), pages 1869-1871.
SPE is alleged to be able to produce relatively highly doped (10.sup.19 cm.sup.3 and even higher) Si. However, the dopant atoms generally are not electrically active, and the method typically requires activation of the dopants by means of a high temperature (typically&gt;700.degree. C.) heat treatment. Due to this high temperature step the method is not well suited to producing sharp dopant profiles. By a "sharp" profile we mean a profile in which the transition from 10% to 90% of the maximum dopant concentration occurs within at most 10 nm.
The prior art also knows examples of MBE growth of GaAs at temperatures substantially below the customary temperatures. For instance, F. W. Smith et al., Applied Physics Letters, Vol. 54(10), pp. 890-892, disclose growth of crystalline material, nominally GaAs, by MBE at 200.degree. C. The material was said to be highly non-stoichiometric (composition Ga.sub.0.99 As.sub.1.01). In a subsequent publication (Picosecond Electronics and Optoelectronics III, D. M. Bloom and T. C. L. G. Sollner, editors, OSA Washington 1989) the authors give more detail, including the fact that the as-deposited material has a lattice constant larger than the GaAs lattice constant, and had relatively low resistivity. After annealing at 600.degree. C. for 10 minutes the lattice constant was the same as the GaAs lattice constant, and the material had high resistivity.
In view of the above referred-to advantages of epitaxial growth at relatively low substrate temperatures, it would be very desirable to have available a low temperature MBE growth technique that is capable of producing (doped or undoped) single crystal epitaxial semiconductor layers of thickness greater than a limiting thickness for epitaxial growth (h.sub.epi). Furthermore, it would be very desirable to have available a MBE growth technique that can be used to produce highly doped single crystal epitaxial Si and other semiconductor layers, with very sharp doping profiles, including very narrow .delta.-doping profiles, and with substantially all of the dopant atoms being electrically active at room temperature. This application discloses such a method.